Configuration question
From: Shalom Bresticker (shalom@msil.sps.mot.com)
Date: Wed Apr 05 2000 - 04:12:05 PDT
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Hi.
<p>I'm preparing a presentation for my company on Verilog-2000,
<br>based on Stuart Sutherland's excellent slides.
<p>I have a question on configurations.
<p>I did not follow the discussions on configurations among the working
group
<br>due to lack of time, so I am looking at this as a newcomer, more or
less.
<p>Section 13.5 on page 211 of draft 5 presents an example which has a
lib.map file containing:
<p> library aLib
adder.*
<br> library gateLib adder.vg
<p>The next paragraph states that the following library structure is yielded:
<p> aLib.adder
// from adder.v
<br> gateLib.adder // from adder.vg
<p>My question is: why does aLib.adder map to adder.v, since adder.vg also
matches adder.* ?
<p>I apologize if the question seems foolish, but Section 13 is not
easy to understand at first reading.
<p>Thanks,
<br>Shalom
<pre>--
************************************************************************
Shalom Bresticker email: shalom@msil.sps.mot.com
Motorola Semiconductor Israel, Ltd. Tel #: +972 9 9522268
P.O.B. 2208, Herzlia 46120, ISRAEL Fax #: +972 9 9522890
<A HREF="http://www.motorola-semi.co.il/"><a href="http://www.motorola-semi.co.il/">http://www.motorola-semi.co.il/>>
************************************************************************</pre>
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