From: Shalom Bresticker (Shalom.Bresticker@motorola.com)
Date: Tue Aug 07 2001 - 21:04:54 PDT
-------- Original Message --------
Subject: Generate & defparams in Vlog-2001.
Date: Tue, 07 Aug 2001 16:10:04 -0700
From: Krishna Garlapati <krishna@synplicity.com>
To: vlog-synth <vlog-synth@eda.org>
<p>Hello folks,
I have a couple of questions reg. the generate stmt specs of
Vlog-2001. I see that there is a "parameter_override" allowed for
generate item. I could not find any examples for this and made up
one.
1. In the context of a for-generate statement is this snippet
of verilog a valid usage of parameter-override ???
module flop(input in, clk, output reg out);
parameter xyz = 1; // dummy, not used
always @(posedge clk)
begin
out <= in;
end
endmodule
module simple(input [7:0] in, in1, output [7:0] out1);
genvar i;
generate for(i=0; i < 8; i = i+1)
begin : somename
flop my_flop(in[i], in1[i], out1[i]);
defparam somename[2].my_flop.xyz = 2; // <----- is this the correct
usage ???
end endgenerate
endmodule
2. If yes, the LRM says that the generated instances names should be :
somename[0].myflop
somename[1].myfop ...etc.
However, the defparam usage has added an extra dot to the above
generated instance names, which can be mistaken by the tools
as a hierarchical name of depth 3 ( the association is left to
right ). In this case though, the depth is just 2 and my opinion
is the association should be done right to left. How can we
differentiate
**clearly** which is which ?? What if the user really has an instance
name called somename[1] ?? How do we flag this error ??? What about
readability ??
Thanks in advance for any input.
-- - Krishna. (408)215-6152
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