From: Pragmatic C Software (sjmeyer@pragmatic-c.com)
Date: Thu Nov 29 2001 - 20:47:15 PST
Precedence: bulk
Quoting Adam Krolnik (krolnik@lsil.com):
> Precedence: bulk
>
>
>
> Good morning;
>
I agree with Cliff here <g>.
>
> One thing worth noting. The reserved word 'cell' is only used in the
> context of
> a configuration block. If context sensitive parsing wasn't so abhored we
> could have
> indicated that this word would be acceptable within modules.
I do not understant this. There are many places even in Verilog 95 such
as UDP parsing that require completely different rules. Scanner and parser
generators (lex, yacc, etc.) always have "subroutine" mechanisms for
exactly this situation. Are you saying that V2K Verilog must emit syntax
error for use of "keyword" cell anywhere and it is not compliant with
V2k to only recognize cell in configuration section?
/Steve
>
>
> Cliff, I maybe the only one missing this, but what proposal is asking
> for a new
> type named 'state'?
>
>
> Adam Krolnik
> Verification Mgr.
> LSI LOgic Corp.
> Plano Tx. 75074
-- Steve Meyer sjmeyer@pragmatic-c.com
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