| Add Proposal | Add Analysis | Edit Class, Environment, or Release |
| Number | 391
|
| Category | enhancement
|
| Synopsis | wreal type
|
| State | open
|
| Class | enhancement
|
| Arrival-Date | Jul 09 2003
|
| Originator | sharp@cadence.com
|
| Release | 2001b
|
| Environment |
|
| Description |
This is a request from my Verilog-AMS contact. Verilog-AMS has a wreal type, which is a wire that carries a real value. However, the datatype enhancement proposal already covers this in a more general way, by allowing any data type to be carried on a net. |
| Fix |
|
| Audit-Trail |
|
| Unformatted |
|
Hosted by Boyd Technology