| Add Proposal | Add Analysis | Edit Class, Environment, or Release |
| Number | 473
|
| Category | enhancement
|
| Synopsis | Preprocessor directive for user defined preprocessor
|
| State | open
|
| Class | enhancement
|
| Arrival-Date | Sep 16 2003
|
| Originator | Adam Krolnik
|
| Release | 2001b
|
| Environment |
|
| Description |
One way to enable the future is to make it easier to convert from one source into another. Some users will write their own source to source translator to expand/change/rewrite incoming source into verilog that can be parsed by the tools. However there is a management problem of this generated source code that makes it difficult to use a flow like this. By defining a method that allows all verilog compilers to run a file through a user defined preprocessor, the process is simplified. Note, this will have limited capabilites as it is not part of any elaboration phase where additional verilog elements can change or specify information to use. For example `preprocess appv2vlg -i -O2 -g Would send the remainder of the file through the preprocessor appv2vlg (ApplicationVerilog to verilog) and consume the resulting output. The additional arguments to the preprocessor must be continued on the same line as the directive itself. |
| Fix |
|
| Audit-Trail |
|
| Unformatted |
|
Hosted by Boyd Technology